I have a lead on a short term piece of work on a customization of a serial
kernel module to meet the specs below.
Contact me offlist if you think this is something you know how to do.
=========== snip from client description of problem ==========
> I have a C program in Linux that talks to slot machine which require a
> wakeup bit be set. The protocol requiers 1 start, 8 data, 1 wakeup, 1
> stop bit.
> Essentially I need the set or 127 characters to go out with the parity
> bit set to zero. In addition I need, at least, to be able to send out
> 0x00, 0x01, 0x80, 0x81 and 0x82 out with the parity bit set to 1.
> Ideally it would be transparent. The starting byte would have the
> wakeup (parity) bit set, the rest of the message would would not.
> I've not been able to use mark parity (does not work) so I am faking
> it by switching parity to emulate the wakeup bit.
> But this presents a timing problem occasionally. Some slots require an
> inter-byte delay of no more than 5ms. The partity switching is causing
> delays in the order of 6 to 8 ms.
> My guess is that the wakeup bit emulation built into the Linux kernel
> would be faster and the same basic idea would work but in under 5ms,
> making the problem disappear. I'm using Fedora Core 4 and would like
> the driver to be installable in FC5 and FC6 if possible.
========= end snip ============