[kwlug-disc] Refurb laptops & monitors - Eco-Tech Recycling?

[John Johnson]

On 2014-04-23 21:24, Gordon Dey wrote:
> For these older CPU Intel chips, the memory controller architecture
> could take advantage of symmetric memory bank pairs. (google this for
> more info, there is an Intel white paper on memory architecture.) That
> is, 2x2GB sticks performs better than 1x4GB and so on. So I would
> advise looking for memory in pairs and in powers of 2 (1, 2, 4, 8, 16)
I may be able to help here, if I do not wind up in the weeds with this 
description.

One reason for a symmetric, banked memory was that there is a 
requirement for a minimum time between successive reads and writes to 
and from semiconductor memory devices. The clock rate of the memory 
subsystem could be matched to achieve this requirement, i.e. slowed down.

Someone decided to move what the CPU would see as successive addresses 
to different physical devices and use hardware to juggle which device 
the CPU was looking at.

For example, I will show this using bytes:

Address 0x0000: would be in device A
Address 0x0001: would be in device B
Address 0x0002: would be in device A
Address 0x0003: would be in device B
and so on.

The CPU would see a contiguous memory space from address 0x00, 0x01, 
0x02 through to 0xFFFF.

It is thought that the distribution of data and executable code would 
most probably be such that both data and executable code, would be 
addressed such that successive accesses to the same physical device 
would not be as often as accesses to the alternate devices. If there 
were successive accesses to the same device, hardware tricks would come 
into play to do things like stretch the clock cycle for the duration of 
the access, thus maintaining the timing requirement for successive 
accesses to the same device.

Of course, 8 bit memory in a PC is a few decades past. But the example 
holds for 16, 32 and 64 bit memory.
(And with bytes, I am skipping over a discussion of the way different 
tribes eat eggs in Gulliver's Travels.)

However, with the 32 and 64 bit memory devices, the "interleaving" is 
still present. But may be either built in to the chips themselves or 
into the memory modules. Or the "interleaving" is built into the chip 
sets on the mother board.

And, if I understand correctly, the symmetric arrangement is built into 
the memory modules as opposed to the way motherboard sockets are 
populated with memory modules. (Ref: Gordon's text above.)

As Gordon suggested, or implied, with older hardware, the memory modules 
might not have a built-in symmetric arrangement of the physical memory 
leaving this up to the memory management subsystems on the mother board. 
And to the way motherboard sockets are populated with memory modules by 
the user.

John Johnson



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